The present invention is related to pulse compression systems.
The term "chip" employed herein is a number of contiguous subpulses of a long pulse with each of the chips providing a code bit.
Pulse compression systems transmit a "long" pulse coded with phase and/or frequency changes, which can be discrete or continuous. At the receiving end a pulse compressor and detector coherently sums the various elements or chips of the transmitted "long" pulse into a "short" pulse of much greater amplitude. In radar, communication, navigation and other systems, it is frequently necessary to make a hard yes or no decision as to whether or not such a pulse was received.
In the prior art this decision was made with a pulse having N chips by providing N delay lines coupled in parallel to the input with their outputs being summed. The adjacent N delay lines had a length progressing from a one chip delay to an N chip delay. As can be seen this becomes a rather cumbersome system, particularly if N is a large number as is the usual case in pulse compression systems.